| AC | Alternating Current. Expression for voltages or currents that alternate with a constant frequency typically provided at an electrical outlet; e.g. common voltages in the US = 110V-120V @ 60Hz, Japan = 100V @ 60Hz/50Hz, Western Europe = 220V @ 50Hz. | ||
| ADC | Analog-to-Digital Converter | ||
| AGN | Active Galactic Nuclei. | ||
| AND | |||
| ATM | Analog-to-Time Module, Toshiba front end for ID PMTs | ||
| ATMPD | Atmospheric Muon (and Neutrino) Proton Decay. | ||
| BCD | Binary-Coded Decimal. | ||
| BIP | Buffering In Progress status flag from the TDC modules; a high-level BIP flag indicates the TDC cannot record incoming data (deadtime) | ||
| BIPn | BIP signal from Hut n | ||
| BIPOR | Combined ("OR"-ed) BIP signal | ||
| Bit3 | (company name) VMEbus adapter/controller for Sun/Solaris computers. | ||
| BTRG | end-of-BIP trigger (trailing edge detector) (See FTRG, LTRG) | ||
| CAMAC | A standard system for mounting, controlling and interfacing fast electronics for particle physics applications; historical successor to NIM and predecessor of Fastbus; used for OD trigger system. Provides computer access to individual modules, but lower density and speed than Fastbus. | ||
| CD | Central Detector, see ID | ||
| Central hut | Electronics hut on the tank top housing VME crates and computers | ||
| CPU | Central Processing Unit | ||
| DAQ | Data Acquisition system | ||
| DBUSY | busy bit of TRG-->FTRG delay circuit, including BIP veto = STRG/FTRG veto | ||
| DC | Direct Current; expression for a voltage or current that remains constant (see AC). | ||
| DC2 | Controller for VME DPMs, mediates transfer of data from Fastbus crates to DPMs. | ||
| dECL | differential ECL (see ECL) logic standard, used for transmitting high-speed digital data over long 'twisted-pair' cables. Needs termination of 100-120 Ohms at the receiver. | ||
| DPM | Dual-Port Memory, in VME crate in central hut; buffers data between Fastbus crates and Sun host. | ||
| dTTL | differential TTL (see TTL) logic standard, used for transmitting medium-speed (<100 MHz) digital data over long 'twisted-pair' cables. 'High' > +0.2V, 'low' < -0.2V between the + and - of the differential pair. Needs 100-120 Ohm termination at receiver and transmitter end. | ||
| ECL | Emitter-Coupled Logic: digital logic standard for GHz operations. 'high' = -0.8...-0.9V, 'low' = -1.6...-1.7V. | ||
| EMI | ElectroMagnetic Interference. | ||
| ENT | Event Number Translator. UW-made custom module for the OD-DAQ. | ||
| EPROM | Eraseable and Programmable Read-Only Memory. | ||
| Fan-In | A circuit to mix more than one input together for one output.
| ||
| Fan-Out |
A circuit to provide multiple identical outputs from an input signal. | ||
| Fastbus | A standard system for mounting, controlling and interfacing fast electronics for particle physics applications; historical successor to NIM and CAMAC and providing the highest density of channels per module. | ||
| FCM | Fanin/-out and Calibration Module. UW-made custom board for the OD-DAQ. | ||
| FDDI | Fiber-optic high rate data bus for local area networks. | ||
| FIFO | First-In, First-Out, a pipeline buffer. | ||
| FIV | Fastbus Interface to VME; a UW-made custom board for the OD-DAQ. | ||
| FRESETn | FSCC reset signal to Hut n. | ||
| FSCC | Fastbus Smart Crate Controller. | ||
| FTRG | Fastbus trigger (= OD TDC common stop) (see BTRG, LTRG,STRG). | ||
| GLB TRG | Global Trigger, generated in the SuperK detector to synchronize data flow at the ID and OD front-end electronics. | ||
| GMT | Greenwich Mean Time; international reference time, based on the local time in Greenwich, UK. See UTC. | ||
| GPS | Global Positioning System, a satellite system which allows receivers to compute position on earth to a few meters, and absolute UTC (prvided by the USNO Master Clock) to 100 nsec. | ||
| HE | High Energy (trigger). | ||
| HV | High Voltage; supply voltage for the PMTs, typ. 1.5 ... 3 kVolts. | ||
| IC | Integrated Circuit; also commonly called "chip". | ||
| ID | Inner Detector (or Central Detector). | ||
| IRIG | Standard coding system for clock data, allowing manufacturer-independent transfer of time data. | ||
| IRQ | Interrupt Request; commonly used signal in a computer-controlled electronics system for briefly interrupting a running software e.g. for handling a trigger occurence. | ||
| Latch | = Register. Circuit to sample and hold digital data at a trigger occurence; similar as FIFO. | ||
| LE | Low Energy (trigger). | ||
| LED | Light Emitting Diode. | ||
| Lemo | (company name) expensive, but commonly used nifty connectors for transfer or fast digital signals (e.g. NIM or TTL levels) over thin coax cables. | ||
| LIFO | Last-In, First-Out, a stack buffer. | ||
| LINAC | Linear Accelerator. | ||
| LSB | Least Significant Bit; lowest-order bit of a grouped binary word, mostly bit 0. Opposite of MSB. | ||
| LTC | Local Time Clock, a UW-built 50 MHz (20 nsec count) counter used to generate fine-grained timestamps for events. | ||
| LTRG | FIFO Latch (V533) trigger (see BTRG, FTRG, STRG). | ||
| MC | Monte Carlo; popular simulation method used in Particle Astrophysics to predict and verify detector performances. | ||
| MSB | Most Significant Bit; highest-order bit of a grouped binary word. E.g. bit 15 of a 16-bit word. Opposite of LSB. | ||
| ne | electron-neutrino. | ||
| NIM | Nuclear Instrumentation Module. An elderly standard for
nuclear-physics electronics modules, providing only standard mountings, voltages and crate
gating; modified NIM crates are used for the SuperK OD QTCs. Also a logic level definition: 'low' = ~0.0V and 'high' = -0.8...-1.6V. Needs termination of 50 Ohms at the receiver if used over coax cables. | ||
| NOVA buffer | Shared memory definition for organized block data transfer in a network computer system; originally developed under OS/9. Widely used in the SuperK workstations for merging and pre-processing raw ID and OD data blocks. | ||
| NSM | Net-Shared Memory; used with the NOVA buffers. | ||
| nt | tau-neutrino. | ||
| nu | muon-neutrino. | ||
| OD | Outer Detector (US contribution to Superk); also called "Anti Detector". | ||
| OR | |||
| PAL | Programmable Array Logic, mostly non-eraseable one-shot programmable logic (TTL) circuit. (See also PLD). | ||
| PCB | Printed Circuit Board. | ||
| pe | Photoelectron; one photon produces 1 pe in the PMT photocathode with about 25% efficiency. | ||
| PLD | Programmable Locic Device: same as PAL, but erasable and re-programmable instead. | ||
| PMT | Photomultiplier Tube. | ||
| Quadrant hut | One of the four electronics huts on tank top housing front-end electronics and power supplies. | ||
| QTC | Charge(Q)-to-Time Converter; part of the BU-built front-end modules (discriminator/QTCs). | ||
| RFI | Radio Frequency Interference; electromagnetic noise that occasionally screws up our DAQ system... | ||
| RS232 | digital data transfer standard with approx. +/- 10V levels; widely used with modems, printers and other lower-speed computer periphals. | ||
| RS485 | see dTTL. | ||
| SK | Super Kamiokande. | ||
| SN | Super Nova. | ||
| SNP | Solar Neutrino Problem. | ||
| SSM | Standard Solar Model. | ||
| STRG | Struck latch trigger (See FTRG, LTRG, BTRG). | ||
| t0 | Reference Global Trigger signal recorded by the TDCs. | ||
| TDC | Time-to-Digital Converter. | ||
| TKO crate | Toshiba fastbus-like crate for ATMs. | ||
| TRG | Commonly refferred to the Global trigger (see GLB TRG). | ||
| TTL | Transistor-Transistor Logic: most popular digital logic standard, operating from a single 5V DC supply. 'Low' = 0...+1V, 'high' = +3...+5V. | ||
| UNIX | Open, multitasking operating system used by most general purpose workstations and mainframes. Proprietary variants include Xenix, Ultrix and Linux. (Originally developed by AT+T; evolved from MULTICS=MULTiplexed Info. + Computing System). | ||
| USNO | United States Naval Observatory; provider of the Master Clock Time for the United States (see GPS and UTC). | ||
| UTC | Universal Time (Coordinated), international standard version of
GMT commonly used for astronomical event logging. | ||
| V533 | see FIFO; module product name used in the OD-DAQ VME electronics. | ||
| VME | Versa Module Europe: international 32-bit (64-bit) parallel computer bus standard. A widely used bus standard which allows interfacing of external equipment to computers. | ||
| VSB | A less-widely used bus used for interfacing industrial equipment. | ||
| WLS | WaveLength Shifter, a doped acrylic plate which converts UV to longer-wavelength light; used in SuperK to increase the collecting area of the relatively small OD PMTs. | ||
| ZEBRA | CERN database system which allows construction and use of pseudo-dynamically allocated tree-structured data under fortran; includes machine-independent data formats so data can be transferred from one CPU to another type. | ||
| ZBS | Japanese homebrew database system, ZEBRA-like (but not identical twin). |